Ashkan D Hajiloo
Electrical/Electronic Research Engineer
Working under the direction of Senior Electrical Engineer, Ashkan’s role is to provide assistance in the development of the Company’s products and projects. This includes:
- Research, development and evaluation of new electrical cable and other electrical or electronic concepts.
- Measurement, recording and analysis of data extracted from test materials.
- Creative design of other electrical devices leveraging the Company’s intellectual property portfolio as required.
- Assisting in development of quality specifications for inspection and testing manufactured based on electrical engineering and regulatory standards
- Assisting in creation, review, development, modification and release technical documentation including drawings, schematics, bills of materials, quality procedures and validation protocols.
- Working on development, prototyping and initial production of electrical products.
Ashkan has been an active contributor towards the research, design, optimisation and testing of the CTS cable and other prototype designs. He has been a core member of the engineering team responsible for conducting the comparative test programme using CTS-enabled cable (two versions) and conventional cable under various testing conditions such as high frequency, high voltage and high current. He has contributed towards determining essential tests and experiments to be conducted while compliant with industry standards, analysing data obtained from projects and experiments, documenting results and details of progress in technical and scientific reports. This also extends to the simulation and modelling of power cables and other circuit designs under various testing and operation scenarios on COMSOL, PSpice and MATLAB software.
Education and qualifications:
2016 – 2017 University College London, Department of Electronic & Electrical Engineering
Degree: Nanotechnology MSc
Degree Classification: Distinction
Individual MSc Project: Growth Optimisation of InAs/GaAs Quantum Dot Lasers on Silicon Substrate for 1.33μm Telecommunication
2013 – 2016 Brunel University London, Department of Electronic & Computer Engineering
Degree: Electronic and Electrical Engineering BEng (Honours)
Degree Classification: 1st Class
Individual MEng Project: Optimised Cascaded Multilevel Inverter
2016 – 2017 University College London, Fleming Scholarship for “Best college examination performance”
2015 – 2016 Brunel University London, Graham Hawks Prize for “best final year project in electrical and computer engineering”
2013 – 2016 Brunel University London National Scholarship